Advances in plasma processing have facilitated growth in the semiconductor industry. Since the semiconductor industry is highly competitive, device manufacturers generally want to maximize yield and efficiently utilize the real estate available on a substrate. During plasma processing of the substrate, a plurality of parameters may need to be controlled to ensure high yield of devices being processed. A common cause of defective devices is the lack of uniformity during substrate processing. Factors that may affect uniformity are substrate edge effects. Another cause of defective devices may be due to polymeric by-products flaking off from the backside of one substrate onto another substrate during transport.
Due to the demand for higher performance devices, the pressure to further reduce substrate feature sizes, as well as the implementation of newer optimized substrate materials, has challenged current fabrication technologies. For example, it is becoming increasing difficult to maintain the uniformity or process results from the center to the edge of larger substrates (e.g., >300 mm). In general, for a given feature size, the number of devices on the substrate near the edge increases as the size of the substrate becomes larger. Likewise, for a given substrate size, the number of devices on the substrate near the edge increases as the feature size of the devices decreases. For example, often over 20% the total number of devices on a substrate are located near the perimeter the substrate.
Due to edge effects, such as electric field, plasma temperature, and the loading effects from process chemistry, the process results near the substrate edge may differ from the remaining (center) area of the substrate. For example, the equipotential lines of the plasma sheath may become disrupted, causing non-uniform ion angular distribution around the substrate edge. Generally, it is desirable for the electric field to remain substantially constant over the entire surface of the substrate in order to maintain process uniformity and vertical etch profiles.
In addition, during the etch process, it may be common for polymer byproducts (e.g., fluorinated polymers, etc.) to form on the substrate backside and/or around the substrate edge. Fluorinated polymers generally are comprised of photo resist material previously exposed to an etch chemistry, or polymer byproducts deposited during a fluorocarbon etch process. In general, a fluorinated polymer is a substance with a chemical equation of CxHyFz, where x, z are integers greater than 0, and y is an integer greater than or equal to 0 (e.g., CF4, C2F6, CH2F2, C4F8, C5F8, etc.).
However, as successive polymer layers are deposited on the edge area as the result of several different etch processes, organic bonds that are normally strong and adhesive will eventually weaken and peel or flake off, often onto another substrate during transport. For example, substrates are commonly moved in sets between plasma processing systems via substantially clean containers, often called cassettes. As a higher positioned substrate is repositioned in the container, a portion of a polymer layer may fall on a lower substrate where dies are present, potentially affecting device yield.
FIG. 1 shows a simplified diagram of a substrate in which a set of edge polymers have been deposited on the planar backside is shown. As previously stated, during the etch process, it may be common for polymer by-products (edge polymers) to form on the substrate. In this example, the polymer by-products have been deposited on the planar backside, that is, the side of the substrate away from the plasma. For example, the polymer thickness may be about 250 nm at about 70° (102), 270 nm at about 45° (104), and about 120 nm at 0° (106). In general, the greater the thickness of the polymer, the higher the probability that a portion of the polymer may become dislodged and fall onto another substrate or the chuck, potentially affecting manufacturing yield.
FIG. 2 shows a simplified diagram of a capacitively-coupled plasma processing system in which the DC potential of the edge ring is substantially greater than that of the substrate. In general, a source RF generated by source RF generator 210 is commonly used to generate the plasma as well as control the plasma density via capacitively coupling. Certain etch applications may require the upper electrode to be grounded with respect to a lower electrode, which is RF powered. The RF power is at least one of 2 MHz, 27 MHz, and 60 MHz. Still other etch applications may require both the upper electrode and the lower electrode to be RF powered using similar RF frequencies.
Generally, an appropriate set of gases is flowed through an inlet in an upper electrode 202. The gases are subsequently ionized to form plasma 204 in order to process (e.g., etch or deposit) exposed areas of substrate 206, such as a semiconductor substrate or a glass pane, positioned with a hot edge ring (HER) 212 (e.g., Si, etc.) on an electrostatic chuck (ESC) 208, which also serves as a powered electrode.
Hot edge ring 212 generally performs many functions, including positioning substrate 206 on ESC 208 and shielding the underlying components not protected by the substrate itself from being damaged by the ions of the plasma. Hot edge ring 212 may further sit on coupling ring 220 (e.g., quartz, etc.), which is generally configured to provide a current path from chuck 208 to hot edge ring 212. In general, a configurable DC power source 216 may be coupled to hot edge ring 212 through RF filter 214.
RF filter 214 is generally used to provide attenuation of unwanted RF power without introducing losses to DC power source 216. RF filter 214 includes a switch module that allows a positive or negative current polarity to be selected, as well as a path to ground. The RF filter 214 includes vacuum relays. RF harmonics are generated in the plasma discharge and may be kept from being returned to the DC power source by the RF filter.
In the case where DC power source 216 is a positive voltage, the DC potential of the edge ring is substantially higher than that of the substrate in a typical plasma process. Thus, the angular ion distribution profile is substantially non-uniform, with a set of vectors that tend to point toward areas of lower potential, such as the substrate edge. This application is highly useful for polymer removal from the substrate edge, as mentioned earlier.
In another case where DC power source 216 is a positive voltage, the DC potential of the edge ring may be substantially similar to that of the substrate (e.g., Vsubstrate−Vedge ring≈0). The DC potential on the substrate during processing tends to be negative with respect to ground, and thus when the edge ring is coupled to receive a negative potential (with respect to ground), the DC potential of the edge ring and the DC potential of the substrate are substantially equal. Consequently, angular ion distribution is substantially uniform, with a set of vectors that are substantially perpendicular to the substrate in an area of the plasma sheath above both the substrate and the edge ring. As previously stated, this perpendicular angular profile may be useful for anisotropic etch applications, such as etching contacts and trenches with high aspect ratios.
It is also possible to, for example, couple the ground terminal of the DC power source, in which case the edge ring may have a higher potential (being at ground) than the DC potential of the substrate (being generally negative during processing, in an embodiment). In this case, the angular ion distribution will also tend toward the substrate edge, albeit to a lesser degree than when the edge ring is coupled to receive voltage from the positive terminal of the DC power source.
However, aforementioned prior art methods employing DC control on hot edge ring may require substantial DC power to sustain the required voltages, adding cost to the fabrication of devices. In addition, arcing between the wafer edge and hot edge ring may cause pitting on substrate edge and damage to the devices, thereby reducing yield.